A logic circuit design might incorporate one or more flip-flops, and related types of circuits, such as buffers and registers. These circuits are each generally capable of maintaining one bit of memory from time to time during operation of the logic circuit, typically including a clock input C, a data input D, and a data output Q. The flip-flop is disposed so that when the clock input C is changed, the data input D is stored in the flip-flop, with the effect that the value of data output Q will be set, on the next cycle of the clock input C, to the value of data input D. This has the effect that a new value Dt+1 stored in the flip-flop after clocking might or might not change from its old value Dt, depending on the input to the flip-flop.
Due to the design of these circuits and the nature of the transistors used in that design, each of those flip-flops consumes dynamic power when clocked, even when their maintained memory bit remains unchanged. This has the effect that, if selected flip-flops are disabled when their memory bit maintained remains unchanged, those selected flip-flops should consume less dynamic power during operation of the logic circuit.